发明名称 Method and apparatus for gating interrupts in a computing system
摘要 A method and apparatus for processing interrupts in a computing system include processing for ordering a plurality of interrupts for at least one processor. Such interrupts include system event interrupts, external device interrupts, and may further include power management interrupts, interprocessor interrupts, and/or intraprocessor interrupts. Such processing continues by generating an interrupt enable/disable signal based on the current context of a corresponding processor such that when the processor is performing a particular task which should not be interrupted, an interrupt signal is prevented from being provided to the processor. The processing also includes generating masking information to provide enable/disable masking information regarding each of the plurality of interrupts. As such, the computing system may enable/disable on a per interrupt basis the processing of a given interrupt. Such selectability in the processing of interrupts on an individual basis or global basis may be processed dynamically thereby providing greater flexibility and efficiency in interrupt processing.
申请公布号 US6574693(B1) 申请公布日期 2003.06.03
申请号 US19990416144 申请日期 1999.10.11
申请人 ATI INTERNATIONAL SRL 发明人 ALASTI ALI;NGUYEN NGUYEN Q.
分类号 G06F13/24;(IPC1-7):G06F9/48;G06F13/26 主分类号 G06F13/24
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