发明名称 |
Dynamic random access memory with low power consumption |
摘要 |
A low power consumption type dynamic random access memory (DRAM) operable with reduced current consumption responsive to an external signal, without causing occurrence of malfunction during low current consumption. An input circuit for receiving signals, a memory array for holding data, and a peripheral circuit for controlling the memory array are driven by an internal voltage supplied by two groups of internal voltage receiving circuits, while an output circuit for outputting signals is driven by an external power supply. The two groups of internal voltage receiving circuits are deactivated in response to an externally provided power supply control signal, and the output circuit is controlled so as to be in a high impedance condition with voltage of the external power supply being applied thereto.
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申请公布号 |
US6574150(B2) |
申请公布日期 |
2003.06.03 |
申请号 |
US20020175859 |
申请日期 |
2002.06.21 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
SUYAMA JUNICHI;NAGAI WATARU;HIROTA AKIHIRO;OHTSUBO SHOTA |
分类号 |
G11C11/407;G11C5/14;G11C11/4074;G11C11/409;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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