发明名称 |
Digital update scheme for adaptive impedance control of on-die input/output circuits |
摘要 |
An adaptive impedance matching arrangement has an adaptive impedance circuit and a control circuit. The adaptive impedance circuit matches the impedance of a bus and is controlled according to control bits supplied by the control circuit. The control bits are updated according to a signal indicating the state of a queue maintaining transactions for the bus.
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申请公布号 |
US6573747(B2) |
申请公布日期 |
2003.06.03 |
申请号 |
US20010965627 |
申请日期 |
2001.09.28 |
申请人 |
INTEL CORPORATION |
发明人 |
RADHAKRISHNAN PRAKASH K. |
分类号 |
H03K19/00;H04L25/02;(IPC1-7):H03K17/16 |
主分类号 |
H03K19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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