发明名称 Mid array isolate circuit layout
摘要 A double pitched array includes isolation devices to divide the array into subarrays, using the same space which is used for bit line twists. This addition allows the one-fourth of the bit line pair which will not be used to propagate signals to not be charged during a memory operation.
申请公布号 US6574128(B1) 申请公布日期 2003.06.03
申请号 US20000651639 申请日期 2000.08.30
申请人 MICRON TECHNOLOGY, INC. 发明人 MORGAN DONALD M.
分类号 G11C7/18;G11C11/4097;(IPC1-7):G11C5/06 主分类号 G11C7/18
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