发明名称 SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE INCLUDING MULTI-BANK STRUCTURE
摘要 PURPOSE: A synchronous semiconductor memory device including a multi-bank structure is provided to use efficiently a sharing data bus line by performing alternately a read operation and a write operation of the first memory bank and the second memory bank. CONSTITUTION: The second memory bank performs a read operation while the first memory bank performs a write operation or the write operation while the first memory bank performs the read operation. The first memory bank performs the write operation to an input data signal inputted into an input/output pin. A write data path(WP) is used for transferring the input data signal to a memory cell of the second memory bank. A read data path(RP) is used for transferring the output data signals of the memory cells of the first and the second memory banks to the input/output pin through the first input/output line.
申请公布号 KR20030042906(A) 申请公布日期 2003.06.02
申请号 KR20010073737 申请日期 2001.11.26
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, CHEOL SU
分类号 G11C11/401;G11C7/00;G11C7/10;G11C11/407;G11C11/408;(IPC1-7):G11C7/00 主分类号 G11C11/401
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