发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To suppress the enlargement of the area for a control circuit section of a semiconductor memory. SOLUTION: The semiconductor memory is provided with a memory cell array 11 having a plurality of memory cells MC. The memory cells MC are arranged at the crossing points of a plurality of word lines WL and a plurality of bit lines BL. A row decoder section 21 is provided adjacent to the memory array cell 11 in the semiconductor memory. The section 21 has a plurality of decoding circuits 21a to selectively drive the word lines WL. Moreover, a control circuit section 51 is provided adjacent to the section 21 in the semiconductor memory. The section 51 has at least one control circuit 42 and a portion 52b of the circuit 52 is arranged within the section 21.
申请公布号 JP2003157673(A) 申请公布日期 2003.05.30
申请号 JP20020118075 申请日期 2002.04.19
申请人 TOSHIBA CORP;FUJITSU LTD 发明人 KONO YOSHIHIRO;IKEDA TOSHIMI
分类号 G11C11/407;G11C11/409;(IPC1-7):G11C11/407 主分类号 G11C11/407
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