发明名称 MULTI-LAYER WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To prevent the peeling of a wiring conductor layer and a feed-through conductor to be generated in a heating process at the time of mounting chip components or an environment-resistance test such as a temperature cycle test, in a multi-layer wiring board where an insulating layer constituted of an insulating film layer is formed on a board. SOLUTION: A plurality of insulating film layers 4 and wiring conductor layers 3 constituted of organic resin are laminated and bonded in multi-layers on a board 1 through insulating adhesive layers 5 between the insulating films 4, and the wiring conductor layers 3 positioned at the upper and lower parts are electrically connected to each other by disposing feed-through conductors 7 in through-holes 6 disposed in the insulating films 4 and the insulating adhesive layers 5 so that a multi-layer wiring board can be constituted. The outer periphery of a joint boundary between the feed-through conductor 7 at the bottom part of the through-hole 6 and the wiring conductor layer 3 is formed so as to be positioned outside the outer periphery of the bottom face of the through-hole 6, so that any stress can be prevented from acting on the outer periphery of the joint boundary of the feed-through conductor 7 at the start point of any crack and the wiring conductor layer 3, and that the peeling of the feed-through conductor 7 and the wiring conductor layer 3 can be prevented.
申请公布号 JP2003158377(A) 申请公布日期 2003.05.30
申请号 JP20010358402 申请日期 2001.11.22
申请人 KYOCERA CORP 发明人 KAWAMURA GENSHITAROU
分类号 H05K3/46;H01L23/12;(IPC1-7):H05K3/46 主分类号 H05K3/46
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