发明名称 FERROELECTRIC MEMORY AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To propose a ferroelectric capacitor having a hysteresis loop capable of actually operating a single matrix ferroelectric memory and device configuration, and to realize the single matrix ferroelectric memory. SOLUTION: The ferroelectric memory is constituted so that the ferroelectric capacitor is formed of a lower electrode, a ferroelectric thin-film and an upper electrode, the lower electrode is used as the first signal electrode, an inter-layer insulating film is formed on the ferroelectric capacitor, a through-hole is formed to the inter-layer insulating film and the upper electrode for the ferroelectric capacitor is connected to the second signal electrode through the through-hole.
申请公布号 JP2003158244(A) 申请公布日期 2003.05.30
申请号 JP20010354722 申请日期 2001.11.20
申请人 SEIKO EPSON CORP 发明人 HASEGAWA KAZUMASA
分类号 H01L27/105;H01L21/8246;(IPC1-7):H01L27/105 主分类号 H01L27/105
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