发明名称 |
Bus system and bus interface |
摘要 |
The invention relates to a bus system comprising a first station (202) and a second station (203, 204) coupled by a bus for transferring data and control signals. The bus is conceived to operate according to a protocol in which the first station (202) repeatedly sends requests to said second station (203, 204) and the second station responds to the requests. The first station (202) comprises an interruptible processor (206) and a bus interface (207). The bus interface (207) is operable to interrupt the interruptible processor (206) upon reception of selected responses of the second station (203, 204). The interruptible processor (206) is operable to handle the interrupts of the bus interface (207).
|
申请公布号 |
US2003101298(A1) |
申请公布日期 |
2003.05.29 |
申请号 |
US20020253260 |
申请日期 |
2002.09.24 |
申请人 |
CHANG YEOW KHAI;ZHANG ZHENYU |
发明人 |
CHANG YEOW KHAI;ZHANG ZHENYU |
分类号 |
G06F13/24;G06F13/42;(IPC1-7):G06F13/00 |
主分类号 |
G06F13/24 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|