发明名称 System-on-chip breakpoint synchronization
摘要 Handling breakpoints includes suspending execution of a peripheral and saving the state of the peripheral in response to a first signal indicating the execution of a breakpoint by a processor. Execution of the breakpoint by the processor is continued in response to receiving a second signal indicating that the state of the peripheral has been saved. The saved state of the peripheral is restored, in response to a third signal indicating the completion of the execution of the breakpoint by the processor.
申请公布号 US2003100133(A1) 申请公布日期 2003.05.29
申请号 US20010994483 申请日期 2001.11.26
申请人 EIDSON MICHAEL A.;XU YAN 发明人 EIDSON MICHAEL A.;XU YAN
分类号 G06F11/36;H01L21/66;(IPC1-7):H01L21/66 主分类号 G06F11/36
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