发明名称 Information bits transmission process with error correction coding, and coder and decoder therefor
摘要 The method involves formation of a second binary matrix via systematic block codes, from a first matrix of input data. A number of values in this derived matrix are not transmitted, the receiver then filling the spaces with samples whose absolute values represent minimum confidence levels. The method is implemented with a coder/decoder which includes a dedicated logical circuit (65) controlled by a processor (66). A RAM (67) is used to store samples from the input signal and decoded values. Samples of the input signal are directed by the processor to the RAM where an input array is generated. A data array and a decision array are also generated and stored at suitable addresses. Each elementary decoding stage consists in reading the corresponding values of the three arrays R, R, D and writing into the memory the new values of the arrays R and D. After a number of 'm' cycles the processor delivers an output signal.
申请公布号 EP0827284(B1) 申请公布日期 2003.05.28
申请号 EP19970401987 申请日期 1997.08.26
申请人 FRANCE TELECOM 发明人 PYNDIAH, RAMESH;ADDE, PATRICK
分类号 G06F11/10;H03M13/00;H03M13/23;H03M13/29;H03M13/45 主分类号 G06F11/10
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