Registered memory unit access device for dynamic RAM module, has access registers arranged between groups of registered memory units such that register outputs are partially connected to inputs of adjacent memory units

摘要

The access registers (50,52) are arranged between the groups of registered memory units (1-3,4-6,7-9) such that the outputs (54,78) of register (50) are partially connected to inputs of both the memory groups (1-3,4-6) and the outputs (56,82) of register (52) are partially connected to inputs of both the memory groups (4-6,7-9). An Independent claim is also included for access register.