Clock generator for electronic devices e.g. memory modules, has signal generator that generates clock signal edges when two phase shifted signals satisfy predetermined relationship with respect to each other

摘要

The clock generator has an interface (24) for receiving n periodic signals having the same frequency. The signals are phase-shifted with respect to each other. A clock signal generator (26) generates respective clock edges of the signals if two of the phase-shifted signals satisfy a predetermined relationship. The frequency of the generated clock signal is n or 2n times that of the phase-shifted signals. An Independent claim is also included for a method for generating a clock signal.