发明名称 Operation amplification circuit, constant voltage circuit and reference voltage circuit
摘要 The invention provides an operation amplification circuit and the like that can reduce current consumption, is not dependent on the power supply voltage, and can suppress mass-production variations. The present invention is equipped with a bias circuit, a differential amplification circuit and an output amplification circuit. The bias circuit 11 includes a reference voltage circuit and a current mirror circuit. The reference voltage circuit includes a depletion type PMOS transistor and an enhancement type PMOS transistor serially connected to each other. The MOS transistor has a gate electrode that is formed from polysilicon including a P-type impurity, and the MOS transistor has a gate electrode that is formed from polysilicon including an N-type impurity. Furthermore, a voltage corresponding to a difference between threshold voltages of the MOS transistors is generated at a commonly connected section of the MOS transistors as a reference voltage.
申请公布号 US6570449(B2) 申请公布日期 2003.05.27
申请号 US20010970762 申请日期 2001.10.05
申请人 SEIKO EPSON CORPORATION 发明人 IKEDA MASUHIDE
分类号 G05F3/24;G05F3/26;H03F1/02;H03F1/30;H03F3/45;(IPC1-7):H03F3/45 主分类号 G05F3/24
代理机构 代理人
主权项
地址