发明名称 Semiconductor integrated circuit and semiconductor integrated circuit wiring layout method
摘要 A semiconductor integrated circuit includes a first wiring layer formed in a first direction, a second wiring layer formed in a second direction perpendicular to the first direction, and a third wiring layer formed in the second direction to sandwich the first wiring layer between the third wiring layer and the second wiring layer. The second and third wiring layers are shifted from each other by a predetermined distance in the first direction. An automatic layout method for a semiconductor integrated circuit, and a recording medium are also disclosed.
申请公布号 US6571379(B2) 申请公布日期 2003.05.27
申请号 US20010888992 申请日期 2001.06.25
申请人 NEC ELECTRONICS CORPORATION 发明人 TAKAYAMA KAZUHISA
分类号 H01L21/3205;G06F17/50;H01L21/82;H01L23/52;H01L23/528;(IPC1-7):G06F17/50 主分类号 H01L21/3205
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