发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE: To provide a semiconductor memory in which precharging of bit lines is conducted at a high speed and in a precise manner. CONSTITUTION: The semiconductor memory is provided with a pair of bit lines to which a plurality of memory cells is connected, a plurality of precharging circuit which are used in order to precharge the bit line pair to a first voltage and a bit line precharge voltage generator which supplies a precharge voltage to the precharge circuits. The bit line precharge voltage generator is provided with a precharge voltage generating circuit 4200 which generates the first voltage and supplies the voltage to the precharge circuits, a first capacitor 200, a charging means 201 which charges the first capacitor and transfer gate circuits (202, 203 and 204) which control the connection/disconnection of the first capacitor and the precharge circuits. The transfer gate circuits are controlled to connect the first capacitor and the precharge circuits during the precharging of the bit lines.
申请公布号 KR20030041806(A) 申请公布日期 2003.05.27
申请号 KR20020071926 申请日期 2002.11.19
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 ORIGASA KENICHI;OHTA KIYOTO;HIROSE MASANOBU
分类号 G01R31/28;G01R31/3185;G11C7/10;G11C7/12;G11C11/401;G11C11/406;G11C11/407;G11C11/409;G11C29/50;(IPC1-7):G11C11/407 主分类号 G01R31/28
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