发明名称 Cache memory array for multiple address spaces
摘要 Apparatus including a cache having a plurality of storage positions for data and for addresses, each of the storage positions including in the storage positions signifying one of a plurality of address spaces; and selection circuitry selecting data from a storage position based on an address including an address space indicator.
申请公布号 US6571316(B1) 申请公布日期 2003.05.27
申请号 US20000595077 申请日期 2000.06.16
申请人 TRANSMETA CORPORATION 发明人 D'SOUZA GODFREY P.;SERRIS PAUL S.
分类号 G06F9/355;G06F9/38;G06F12/08;(IPC1-7):G06F12/06 主分类号 G06F9/355
代理机构 代理人
主权项
地址