| 摘要 |
PURPOSE: To provide a design method for a semiconductor device, which can supply source voltages to different domains independently, suppresses clock jitters, and prevents the operating speed of a logic from decreasing. CONSTITUTION: A plurality of power supply lines WL1 which are electrically connected to power supply bumps BP1 and BP2 are arranged in parallel to lateral arrays of the power supply bumps BP1 and BP2, and a plurality of power supply lines WL2 of a lower layer which are electrically connected to the power supply lines WL1 are arranged in parallel to each other orthogonally to the power supply lines WL1 in plane view. Then source voltages G1 and G2 are assigned to the nearest two supply lines W1 across the array of power supply bumps BP2. The power supply lines WL2 are arranged in parallel to each other orthogonally to the power supply lines WL1 in plan view. |
