发明名称 |
Synthesizer with lock detector, lock algorithm, extended range VCO, and a simplified dual modulus divider |
摘要 |
The present invention provides a synthesizer having an efficient lock detect signal generator, an extended range VCO that can operate within any one of a plurality of adjacent characteristic curves defined by a plurality of adjacent regions, and a divide circuit implemented using only a single counter along with a decoder. This allows for a method of operating the synthesizer, methods of establishing or reestablishing a lock condition using the extended range VCO, and a method of designing a plurality of divide circuits which each use the same single counter and each use a different decoder.
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申请公布号 |
US6570453(B2) |
申请公布日期 |
2003.05.27 |
申请号 |
US20020099229 |
申请日期 |
2002.03.13 |
申请人 |
ATHEROS COMMUNICATIONS, INC. |
发明人 |
SU DAVID K.;YUE CHIK PATRICK;WEBER DAVID J.;ZARGARI MASOUND |
分类号 |
H03K23/66;H03L7/089;H03L7/095;H03L7/099;H03L7/10;H03L7/183;H03L7/193;(IPC1-7):H03L7/00 |
主分类号 |
H03K23/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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