发明名称 Methods for forming co-axial interconnect lines in a CMOS process for high speed applications
摘要 A method of forming a co-axial interconnect line in a dielectric layer is provided. The method includes defining a trench in the dielectric layer and then forming a shield metallization layer within the trench. After forming the shield metallization layer, a conformal oxide layer is deposited within the shield metallization layer. A center conductor is then formed within the conformal oxide layer. Once the center conductor is formed, a fill oxide layer is deposited over the center conductor. A cap metallization layer is then formed over the fill oxide layer and is in contact with the shield metallization layer.
申请公布号 US6569757(B1) 申请公布日期 2003.05.27
申请号 US19990429540 申请日期 1999.10.28
申请人 发明人
分类号 H01L21/3205;H01L21/768;H01L21/822;H01L21/8238;H01L23/522;H01L27/04;H01L27/092;(IPC1-7):H01L21/476 主分类号 H01L21/3205
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