发明名称 Digital still camera and image data processor
摘要 The invention relates to an image data expansion processor for digital still camera. Two blocks of 8-bit luminance data and one block of 8-bit color difference data are repeatedly output from a compressing/expanding unit in the above order and are supplied to a buffer memory. Two blocks of 16-bit data to be written are generated corresponding to the two blocks of 8-bit luminance data and one block of 8-bit color difference data, are sequentially supplied from the buffer memory to a frame memory in units of block and are written to the frame memory. Each of luminance data and color difference data is not written to the frame memory in units of block but 16-bit data to be written composed of these luminance data and color difference data is written to the frame memory in units of block. The number of blocks written to the frame memory can be reduced and total time required for switching an address in the direction of lines can be reduced.
申请公布号 US6570925(B1) 申请公布日期 2003.05.27
申请号 US19990371102 申请日期 1999.08.10
申请人 SONY CORPORATION 发明人 SANO CHIKAKO
分类号 H04N9/79;H04N1/64;H04N5/225;H04N9/07;H04N9/804;H04N9/808;H04N11/04;(IPC1-7):H04N7/12;H04N11/02 主分类号 H04N9/79
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