发明名称 VERTICAL TRANSISTOR AND ITS MANUFACTURING METHOD
摘要 PURPOSE: A vertical transistor and its manufacturing method are provided to increase the current of a collector by lowering a resistance of the collector. CONSTITUTION: An N type epitaxial layer(12) is grown on an upper face of a P type substrate(2). An N- buried layer(4) is diffused between the P type substrate(2) and the N type epitaxial layer(12). A P++ buried layer(6) is diffused between the N- buried layer(4) and the N type epitaxial layer(12). An N+ well(16) is formed on the N type epitaxial layer(12) of an upper portion of the P++ buried layer(6). A P+ emitter region(18) is formed on the N+ well(16). An N+ base region(19) is formed on the N+ well(16) adjacent to the P+ emitter region(18). A P+ collector region(14) is formed on the N type epitaxial layer(12).
申请公布号 KR20030040857(A) 申请公布日期 2003.05.23
申请号 KR20010071444 申请日期 2001.11.16
申请人 KEC CORP. 发明人 KIM, CHANG GYUN;LEE, JEONG HWAN
分类号 H01L29/732;(IPC1-7):H01L29/732 主分类号 H01L29/732
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