发明名称 MEMORY DEVICE AND INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide an FAMOS memory location which can have at least three completely natural program levels. SOLUTION: An FAMOS memory location is provided with a single floating gate (GR) overlapping the active plane of a semiconductor substrate along contour (PF1, PF2) of at least two asymmetric overlaps in order to determine at least two electrodes in an active region. A memory location program means (MC, SW) applies a set of specified different voltages selectively to the electrodes such that at least three program logical levels are outputted to the memory location.</p>
申请公布号 JP2003152119(A) 申请公布日期 2003.05.23
申请号 JP20020252983 申请日期 2002.08.30
申请人 ST MICROELECTRONICS SA 发明人 DRAY CYRILLE;CASPAR DANIEL;FOURNEL RICHARD
分类号 G11C16/02;H01L21/8247;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 G11C16/02
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