发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory in which the reliability of memory cell can be enhanced by suppressing electron trap in a gate insulation film. SOLUTION: A flash memory comprises a p-type silicon substrate 10, a plurality of source-drain regions 16 provided in the surface of the silicon substrate 10 while being spaced apart from each other, a multilayer gate including a charge storage layer 12 and a control gate 13 provided on the silicon substrate 10 between the source-drain regions 16 through a gate insulation film 11, and an insulation film 17 provided on the source-drain regions 16 wherein a level difference is provided between a first interface of the gate insulation film 11 and the silicon substrate 10 and a part of a second interface of the insulation film 17 and the source-drain region 16 so that the surface of channel region in the silicon substrate 10 is located higher than a part of the source-drain region 16.
申请公布号 JP2003152116(A) 申请公布日期 2003.05.23
申请号 JP20010352020 申请日期 2001.11.16
申请人 TOSHIBA CORP 发明人 YAEGASHI TOSHITAKE
分类号 H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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