发明名称 UNIT DEVICE AND CLOCK DISTRIBUTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the delay of a clock signal to be transmitted to each of a plurality of unit devices when those ground-separated unit devices where clock signals should be synchronously operated are cascade-connected. SOLUTION: This unit device is provided with a clock source connector 12 for connecting a clock source 14, a reception connector 17, a transmission connector 18, a unit functioning part 16, and a clock distribution circuit 20 connected to each of them. The clock distribution circuit 20 includes a photocoupler 15, and the photocoupler 15 is connected between the unit functioning part 16 and the reception connector 17, and not connected between the reception connector 17 and the transmission connector 18.
申请公布号 JP2003150271(A) 申请公布日期 2003.05.23
申请号 JP20010345723 申请日期 2001.11.12
申请人 OKI ELECTRIC IND CO LTD;OKI COMTEC LTD 发明人 KATO SHINTA;KONDO KOJI
分类号 G06F1/10;H01L31/12;H04B10/00;H04B10/556;H04L25/02 主分类号 G06F1/10
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