| 摘要 |
<p>PROBLEM TO BE SOLVED: To improve accuracy of delaying data of a CMOS buffer circuit, when it is used with a low power-supply voltage. SOLUTION: In the CMOS buffer circuit, although an nMOS 42 is brought into ON-state when an inversion signal A3 of an inverter 30 changes from 'L' to 'H', since a node N4 is already at 'H' at this time, a current path is formed between a node N1 and the ground. Therefore, the nMOS 42 and an nMOS 44 prevent the increase in the level of the node N1. In this case, the start of the operation of a delay circuit 40 obtained, when the temperatures of an nMOS 41, the nMOS 42, an nMOS 43, and the nMOS 44 which constitute the delay circuit 40 are high, while being accompanied by their low threshold voltages becomes earlier than the one obtained, when their temperatures are low, and at this time, the changing action of the node N1 to 'H' or 'L' is suppressed. Therefore, the transmission delay time of the CMOS buffer circuit becomes large. That is, suppressed the reversing phenomenon, where the transmission delaying time obtained when the temperature of the CMOS buffer circuit is high becomes smaller than obtained, when its temperature is low.</p> |
