发明名称 VARIABLE DELAY CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To realize a variable delay circuit, capable of miniaturization and an improvement of vibration-proof, and of adjusting delay time electrically. SOLUTION: In a variable delay circuit for delaying and outputting an input signal by variable delay time, there are provided a differential circuit where the input signal is applied to one input terminal thereof and reference voltage is applied to the other input terminal, a load resistor to which an output of the differential circuit is connected, and an emitter follower circuit, where one electric potential of the load resistor is outputted as an output signal. Delay time is adjusted, by controlling the delay control voltage at the other end of a resistor, constituting the emitter follower circuit to which the output signal is applied.</p>
申请公布号 JP2003152511(A) 申请公布日期 2003.05.23
申请号 JP20010348585 申请日期 2001.11.14
申请人 YOKOGAWA ELECTRIC CORP 发明人 TOYAMA AKIRA;ODAKA HIROHISA;OKITA HIRONORI
分类号 H03H11/26;H03K5/13;(IPC1-7):H03K5/13 主分类号 H03H11/26
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