发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To solve the problem wherein emitter resistance is increased and reliability is lowered, in a method for manufacturing a self-aligned bipolar transistor of conventional technology, since voids occur at the deposition of an emitter N<+> -type polysilicon because the aspect ratio of an opening for emitter formation is large in the transistor. SOLUTION: Before forming an emitter polysilicon 15, sidewall insulating films are formed at an opening at the upper part of an emitter formation area, resist is embedded in between the sidewall insulating films, and the upper parts of the sidewall insulating films are etching-removed to lower the heights of the sidewall insulating films. Thus, the emitter polysilicon 15 embedded to the lowered sidewall insulating films 13c comes to have structure free of voids, and an effective emitter of 0.2μm or shorter than this is obtained.
申请公布号 JP2003151986(A) 申请公布日期 2003.05.23
申请号 JP20010349924 申请日期 2001.11.15
申请人 NEC YAMAGATA LTD 发明人 MATSUOKA AKIO
分类号 H01L21/331;H01L29/732;(IPC1-7):H01L21/331 主分类号 H01L21/331
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