发明名称 |
NONVOLATILE SEMICONDUCTOR MEMORY |
摘要 |
<p>PROBLEM TO BE SOLVED: To obtain an NROM type memory array of such a structure as adjacent memory units MU share a diffusion bit line interposed between in which generation of a through current path is blocked at the time of reading or writing data simultaneously from or into two memory transistor cells. SOLUTION: Generation of a through current path can be blocked at the time of reading or writing data by dividing an NROM type memory array for each memory block and providing a part for isolating each memory block electrically in the boundary region thereof thereby limiting the number of data being read out or written in simultaneously to only one.</p> |
申请公布号 |
JP2003152117(A) |
申请公布日期 |
2003.05.23 |
申请号 |
JP20010353238 |
申请日期 |
2001.11.19 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
KATO HIROSHI;OISHI TSUKASA |
分类号 |
G11C5/02;G11C8/12;G11C16/02;G11C16/04;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 |
主分类号 |
G11C5/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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