发明名称 |
CLOCK ARCHITECTURE FOR A FREQUENCY-BASED TESTER |
摘要 |
A clock system is disclosed for distributing and generating a digital clock signal for a plurality of electronic assemblies. The clock system includes a remote fixed-frequency clock for generating a first clock signal of a first frequency and a plurality of local clock modules. The local clock modules are respectively disposed on the plurality of electronic assemblies and each include synthesizer circuitry for creating a variable clock signal of a different frequency than the first frequency. Fanout circuitry is coupled between the remote fixed frequency clock and the plurality of local clock modules to distribute the first clock signal. |
申请公布号 |
WO03042710(A2) |
申请公布日期 |
2003.05.22 |
申请号 |
WO2002US35669 |
申请日期 |
2002.11.07 |
申请人 |
TERADYNE, INC. |
发明人 |
REICHERT, PETER, A.;GAGE, ROBERT, B. |
分类号 |
G01R31/319 |
主分类号 |
G01R31/319 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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