发明名称 Level converter for high-speed semiconductor device, generates delayed level-converted output signal whose pulse width is set as sum of predetermined delay time and internal operation delay time
摘要 A converter (110) outputs a level-converted signal in response to an input signal. A delay unit (120) delays the level converted signal, by a predetermined time. A self-reset unit (130) generates a reset signal in response to the delayed level converted signal so that the pulse width of level converted signal is set as the sum of predetermined delay time and an internal operation delay time. Independent claims are also included for the following: (1) signal converting apparatus; (2) level converting method and (3) signal converting method.
申请公布号 DE10212950(A1) 申请公布日期 2003.05.22
申请号 DE20021012950 申请日期 2002.03.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, NAM-SEOG;CHO, UK-RAE;LEE, KWANG-JIN
分类号 H03K19/0185;H03K3/356;H03K5/06;(IPC1-7):H03K5/02;H02M3/04 主分类号 H03K19/0185
代理机构 代理人
主权项
地址