发明名称 Packaging substrate and manufacturing method thereof, integrated circuit device and manufacturing method thereof, and saw device
摘要 A basic portion layer 21 of a substrate electrode 12a connected to a projecting electrode 13 electrically and mechanically on a substrate member of ceramics. The substrate member on which the basic portion layer 21 is formed is subjected to sintering. A surface of the basic portion layer 21 in the sintered substrate member is polished. On the polished basic portion layer 21, the plating layers 22, 23 are formed, so that surface roughness of the substrate electrode 12a may be, for example, not larger than 0.1 µmRMS. Accordingly, junction strength of an integrated circuit element mounted on a packaging substrate by a flip-chip method can be improved.
申请公布号 EP1313214(A2) 申请公布日期 2003.05.21
申请号 EP20020025815 申请日期 2002.11.18
申请人 TDK CORPORATION 发明人 NAKANO, MASAHIRO;GUNJI, KATSUHIKO;OIKAWA, YASUNOBU;SATO, KATSUO
分类号 H03H9/05;H03H9/08 主分类号 H03H9/05
代理机构 代理人
主权项
地址