| 摘要 |
A power MOSFET device comprising a low resistance substrate (11) of the first conductivity type, a high resistance epitaxial layer (12) of the first conductivity type formed on the low resistance substrate, a base layer (13a) of the second conductivity type formed in a surface region of the high resistance epitaxial layer, a source region (14a) of the first conductivity type formed in a surface region of the base layer, a gate insulating film (17a) formed on the surface of the base layer so as to contact the source region, a gate electrode (16a) formed on the gate insulating film, and an LDD layer (18) of the first conductivity type formed on the surface of the high resistance epitaxial layer oppositely relative to the source region and the gate electrode, wherein the LDD layer (18) and the low resistance substrate (11) are connected to each other by the high resistance epitaxial layer. |
