发明名称 Shallow trench isolation spacer for weff improvement
摘要 A method for performing trench isolation during semiconductor device fabrication is disclosed. The method includes patterning a hard mask to define active areas and isolations areas on a substrate, and forming spacers along edges of the hard mask. Trenches are then formed in the substrate using the spacers as a mask, thereby increasing the width of the substrate under the active areas and increasing Weff for the device.
申请公布号 US6566230(B1) 申请公布日期 2003.05.20
申请号 US20010032630 申请日期 2001.12.27
申请人 ADVANCED MICRO DEVICES, INC. 发明人 SACHAR HARPREET K.;KIM UNSOON;CHANG MARK S.;YANG CHIH Y.;BHAKTA JAYENDRA D.
分类号 H01L21/762;(IPC1-7):H03L21/76 主分类号 H01L21/762
代理机构 代理人
主权项
地址