发明名称 |
Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
摘要 |
A method of enhancing erasure of a cell having a non-conductive charge trapping layer, the cell having a gate generally over the charge trapping layer includes programming the cell to minimize the width of a trapping region within the charge trapping layer by reading with a minimum voltage on the gate in a direction opposite that of programming.
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申请公布号 |
US6566699(B2) |
申请公布日期 |
2003.05.20 |
申请号 |
US20010939570 |
申请日期 |
2001.08.28 |
申请人 |
SAIFUN SEMICONDUCTORS LTD. |
发明人 |
EITAN BOAZ |
分类号 |
G11C16/10;G11C16/14;G11C16/26;H01L21/28;H01L29/792;(IPC1-7):H01L31/119 |
主分类号 |
G11C16/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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