发明名称 PLL circuit including a DC power source alarm
摘要 A PLL circuit comprises a circuit which issues an alarm when fluctuation of the potential of a DC power source connected to the PLL circuit exceeds a predefined range. A first potential generation circuit generates a first potential higher than a steady-state potential of the DC power source. A second potential generation circuit generates a second potential lower than the steady-state potential of the DC power source. A first comparator circuit compares a local maximum potential of the DC power source with the first potential. A second comparator circuit compares a local minimum potential of the DC power source with the second potential. A supply circuit supplies a drive voltage to an alarm issuer, in a case where the local maximum potential is higher than the first potential, and/or the local minimum potential is lower than the second potential, based on the comparison results.
申请公布号 US6566965(B2) 申请公布日期 2003.05.20
申请号 US20010973026 申请日期 2001.10.10
申请人 NEC CORPORATION 发明人 KAMIYA HIROSHI
分类号 H02H7/20;G01R19/165;H02H3/44;H03L1/00;H03L7/08;(IPC1-7):H03L7/00 主分类号 H02H7/20
代理机构 代理人
主权项
地址