发明名称 Bi-layer etch stop for inter-level via
摘要 An inter-level metallization structure and the method of forming it, preferably based on copper dual damascene in which the lower-metal level is formed with a exposed metallization and an adjacent, embedded stop layer, both the metallization and embedded stop layer have exposed surfaces approximately level with each other with a lower dielectric layer. The upper-metal level includes a second stop layer deposited over the embedded stop layer and the first metallization and a second dielectric layer. An inter-level via is etched through the second dielectric layer and through the second stop layer and metal is filled into the via to contact the metallization. If the inter-level via is offset over the edge of the metallization, the metal in the via contacts the embedded stop layer and not the first dielectric layer, whereby the embedded stop layer acts as a copper diffusion barrier. The structure and method are particularly useful when the sidewalls of via hole are first coated with a second copper barrier layer but the via bottom is not so coated, thereby decreasing contact resistance and allowing copper diffusion in the absence of an in-line barrier.
申请公布号 US6566258(B1) 申请公布日期 2003.05.20
申请号 US20000568620 申请日期 2000.05.10
申请人 APPLIED MATERIALS, INC. 发明人 DIXIT GIRISH A.;CHEN FUSEN
分类号 H01L21/28;H01L21/3205;H01L21/768;H01L23/52;H01L23/522;(IPC1-7):H01L21/302 主分类号 H01L21/28
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