发明名称 Method and system for providing a power lateral PNP transistor using a buried power buss
摘要 A power lateral PNP device is disclosed which includes an epitaxial layer; a first and second collector region embedded in the epitaxial layer; an emitter region between the first and second collector regions. Therefore slots are placed in each of the regions. Accordingly, in a first approach the standard process flow will be followed until reaching the point where contact openings and metal are to be processed. In this approach slots are etched that are preferably 5 to 6 um deep and 5 to 6 um wide. These slots are then oxidized and will be subsequently metalized. When used for making metal contacts to the buried layer or for ground the oxide is removed from the bottom of the slots by an anisotropic etch. Subsequently when these slots receive metal they will provide contacts to the buried layer where this is desired and to the substrate when a ground is desired. In a second approach the above-identified process is completed up through the slot process without processing the lateral PNPs. With a separate masking and etching the oxide is removed from the PNP slots and boron is deposited in a diffusion furnace and driven in a non oxidizing atmosphere.
申请公布号 US6566733(B1) 申请公布日期 2003.05.20
申请号 US20020176285 申请日期 2002.06.19
申请人 发明人
分类号 H01L21/331;H01L21/74;H01L29/417;H01L29/73;H01L29/735;(IPC1-7):A01L29/00 主分类号 H01L21/331
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