发明名称 Semiconductor device manufacturing method having a step of forming a post terminal on a wiring by electroless plating
摘要 A method of manufacturing a semiconductor device is provided. The method includes the steps of forming a wiring layer on an underlying metal film formed on a substrate, the wiring layer being electrically connected to an electrode pad formed on a substrate, removing a part of the wiring layer so as to form a wiring on the substrate, a part of the underlying metal film being exposed other than a part where the wiring is formed, removing the exposed part of the underlying metal film by using the wiring as a mask, forming a barrier metal film on the wiring so as to cover the wiring and the underlying metal film underneath the wiring, forming a post terminal by electroless plating so that the post terminal is electrically connected to said wiring and providing a sealing resin so as to cover said substrate except a position at which said post terminal is formed.
申请公布号 US6566239(B2) 申请公布日期 2003.05.20
申请号 US20010867545 申请日期 2001.05.31
申请人 FUJITSU LIMITED 发明人 MAKINO YUTAKA;WATANABE EIJI;MATSUKI HIROHISA;FUJISAWA TETSUYA
分类号 H01L23/52;H01L21/288;H01L21/3205;H01L21/56;H01L21/60;H01L23/12;(IPC1-7):H01L21/44 主分类号 H01L23/52
代理机构 代理人
主权项
地址