| 摘要 |
PROBLEM TO BE SOLVED: To provide a FIFO memory, a control system for the FIFO memory, a semiconductor unit, and an information processing unit, without deteriorating a system performance due to frequent interruption to a CPU. SOLUTION: This memory unit includes a rate control means 18. The rate control means 18 comprises threshold maintaining means 24, 26 for providing a plurality of thresholds TLH or THL relating to data volume; a comparison means 20 for comparing data volume indication signals Do with the thresholds TLH or THL; a means 28 for varying the thresholds provided by the threshold maintaining means 24, 26 and compared by the comparison means 20 according to threshold selecting signals; and a rate control signal generation means 22 for generating rate control signals INTR and threshold selecting signals SELT relating to the output of the comparison means 20.
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