发明名称 DIGITAL CONVERGENCE CORRECTION CIRCUIT AND DISPLAY DEVICE EMPLOYING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a digital convergence correction circuit that can reduce disturbance in the convergence caused when a CPU operates a memory at adjustment of the convergence. SOLUTION: In the case that an address changeover device 112 is controlled to select a first address signal outputted from an address generator 111 and a data changeover device 114 is controlled to connect a memory 113 and a selector 117, the selector 117 controls the selection of an output of the data changeover device 114, and in the case that the address changeover device 112 is controlled to select a second address signal outputted from a CPU 140 and the data changeover device 114 is controlled to connect the memory 113 and the CPU 140, the selector 117 controls each section of a digital convergence circuit to select the output of a storage means 116.
申请公布号 JP2003143619(A) 申请公布日期 2003.05.16
申请号 JP20010340130 申请日期 2001.11.06
申请人 HITACHI LTD;HITACHI VIDEO & INF SYST INC 发明人 YOSHIZAWA KAZUHIKO;MATSUMI KUNINORI;WATANABE TOSHIMITSU
分类号 H04N9/28;(IPC1-7):H04N9/28 主分类号 H04N9/28
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