发明名称 MEMORY DEVICE AND ITS INTERNAL CONTROL METHOD
摘要 PURPOSE: A memory device and its internal control method are provided to achieve efficient access and current consumption reduction. CONSTITUTION: A memory device includes a memory array(36) including a plurality of memory cells arranged in accordance with the first address and the second address which define a logical address map indicating a logical shape of the memory array. An address map changing unit(30,31,32,33,34,35) operatively coupled to the memory array receives the first address signal for generating the first address and the second address signal for generating the second address, wherein the address map changing unit is capable of changing the logical address map by altering a part of one of the first address signal and the second address signal.
申请公布号 KR20030038450(A) 申请公布日期 2003.05.16
申请号 KR20020068347 申请日期 2002.11.06
申请人 FUJITSU LIMITED 发明人 IKEDA SHINICHIRO;KATO YOSHIHARU
分类号 G11C11/4074;G11C11/4076;G11C11/408;(IPC1-7):G11C11/401 主分类号 G11C11/4074
代理机构 代理人
主权项
地址