发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory in which power consumption can be reduced while reducing wiring regions. SOLUTION: This semiconductor memory is constituted by arranging blocks 10 having a plurality of sections operated independently mutually in the direction of X (column) and Y (row) of a chip respectively. Each section 1 has a cell group consisting of a plurality of memory cells 11, a section selecting circuit 12, a word line selecting circuit 13, a column selecting circuit 14, a sense amplifier 15, a write circuit 16. As at least part of signals transmitted and received between a decoder control circuit 3 and each section 1 is transmitted to each section 1 using a wiring W1 extending in the direction of X from the decoder control circuit 3 and a wiring W2 orthogonally intersecting with this wiring W1 and passing over the section, the number of wirings arranged between sections 1 in Y direction can be reduced, while adjacent sections 1 can be arranged near the Y direction.
申请公布号 JP2003141878(A) 申请公布日期 2003.05.16
申请号 JP20010332232 申请日期 2001.10.30
申请人 TOSHIBA CORP 发明人 KAWASUMI ATSUSHI
分类号 G11C11/41;G11C5/06;G11C8/10;G11C11/40;H01L21/8242;H01L27/108 主分类号 G11C11/41
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