发明名称 Process for manufacturing multiple layer wiring substrate onto which thin film capacitor is incorporated
摘要 A process is provided for manufacturing a multiple layer wiring board incorporated therein a thin-film capacitor. The process comprising the following steps of: covering a first conductor pattern formed on an insulating layer, except for a lower electrode forming region of a thin film capacitor, with a first resist film; forming a metallic film layer consisting of a barrier metal layer and tantalum metal layer, in this order, on an entire face of the first conductor pattern covered with the first resist film; removing the first resist film to remove the metallic film layer, except for the lower electrode forming region, from a face of the first conductive pattern; covering a face of the first conductor pattern, except for a lower electrode forming region of the first conductor pattern, with a second resist film; forming an anodic oxidation film on the metallic film layer exposed from the second resist film; removing the second resist film and attaching an adherence layer and a metal seed layer, in this order, on the anodic oxidation film and on the conductor pattern; and forming a second conductor pattern, which becomes an upper electrode, on the anodic oxidation film.
申请公布号 US2003088978(A1) 申请公布日期 2003.05.15
申请号 US20020291468 申请日期 2002.11.12
申请人 SHINKO ELECTRIC INDUSTRIES CO., LTD. 发明人 TAKANO AKIHITO;FUJISAWA AKIRA;ROKUGAWA AKIO
分类号 H05K3/46;H01L21/48;H05K1/16;H05K3/04;H05K3/38;(IPC1-7):H05K3/02;H05K3/10 主分类号 H05K3/46
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