| 摘要 |
<p>A comparator is arranged to compare a series of analog voltage signal samples on a first capacitor with a voltage on a second capacitor which is linearly increased or decreased to equal the sample value. The comparator's single output freezes the count of the counter at counts which are proportional to the voltage of the respective samples. In this manner, analog to digital conversion can be accomplished using a single line between the analog and digital sides of a circuit, thereby reducing parasitic capacitance.</p> |
