发明名称 |
Biasing technique for a high density SRAM |
摘要 |
According to one embodiment, a memory cell is disclosed. The memory cell includes a first PMOS transistor, a first NMOS transistor coupled to the first PMOS transistor, a second PMOS transistor and a second NMOS transistor coupled to the first PMOS transistor. The first and second PMOS transistors receiving a bias control signal.
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申请公布号 |
US2003090927(A1) |
申请公布日期 |
2003.05.15 |
申请号 |
US20010991864 |
申请日期 |
2001.11.13 |
申请人 |
ZHANG KEVIN X.;WEI LIQIONG |
发明人 |
ZHANG KEVIN X.;WEI LIQIONG |
分类号 |
G11C11/412;(IPC1-7):G11C11/00 |
主分类号 |
G11C11/412 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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