发明名称 Asynchronous N X M arbitrating switch and associated method
摘要 A switch for routing information to one of a first and second outputs, respectively, is provided. The switch includes first and second multi-rail control paths, first and second mutex gates, and first and second demultiplexers. The first and second multi-rail control paths are cross connected into the first and second gates. Outputs of the first and second mutex gates are cross connected into the first and second demultiplexers. First and second data paths input to the first and second demultiplexers, respectively. Data on at least one the first and second data paths is routed to one of the first and second outputs based upon a state of the outputs of the first and second mutex gates.
申请公布号 US2003091038(A1) 申请公布日期 2003.05.15
申请号 US20010986665 申请日期 2001.11.09
申请人 HAGEDORN MICHAEL S. 发明人 HAGEDORN MICHAEL S.
分类号 H04L12/50;H04L12/56;(IPC1-7):H04L12/50 主分类号 H04L12/50
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