Circuits and methods for extending the input common mode voltage range of JFET op-amps

摘要

Circuits and methods for extending the input common mode voltage range of a JFET op-amp are provided. The circuits and methods consist of modifying the input stage of a JFET op-amp to include a BJT pair as the input differential pair and use a JFET pair as followers. Using the BJTs as the input differential pair enables the JFET followers to operate in the linear region of operation when the op-amp's input is approaching ground, thereby increasing the negative common mode voltage range. The positive common mode voltage range is increased by reducing the source current in the JFET pair and using a transistor pair as clamping transistors.