发明名称 Level converting latch
摘要 A level converting latch, using dual-supply voltage signals and operating with reduced charge contention, converts an input signal having a first and a second potential level into an output signal also having a first and a second potential level. The first potential level of the input and output signals are the same. The second potential level of the input and output signals are unequal.
申请公布号 US6563357(B1) 申请公布日期 2003.05.13
申请号 US20010027905 申请日期 2001.12.20
申请人 INTEL CORPORATION 发明人 HSU STEVEN K.;CHATTERJEE BHASKAR P.;KRISHNAMURTHY RAM K.
分类号 H03K3/356;(IPC1-7):H03K3/356 主分类号 H03K3/356
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