Semiconductor memory array of floating gate memory cells with floating gates having multiple sharp edges

摘要

A semiconductor memory array of floating gate memory cells in a semiconductor substrate having a plurality of spaced apart isolation regions and active regions on the substrate substantially parallel to one another in the column direction. Floating gates are formed in each of the active regions, each having a pair of upwardly extending sharp edges that extend lengthwise parallel to, and are adjacent to, one of the isolation regions. Control gates are each formed with a substantially vertical face portion. An insulation sidewall spacer is formed against the vertical face portion. The control gates have protruding portions that extend over the floating gates, including portions of the pair of upwardly extending sharp edges.